Currently, gate metal etch processes employ a nitride or oxide mask for the formation of gate metal in semiconductor devices. The nitride mask is patterned by using a photoresist mask. The process begins by forming a nitride layer on the surface being masked. A photoresist mask layer is then formed on the nitride. Formation of a photoresist mask takes many steps. Typically, five steps are required. The nitride layer is then etched and used as a mask to etch the underlying material. This typically takes four steps. Once the desired topography is formed, the nitride mask must be removed. An additional three steps are used here.
In addition to taking numerous steps which add to costs and reduce yields, the conventional process using photoresist can cause contamination problems. Furthermore, etching is required to remove unwanted material, and masks are removed by etching, solvent, or the like. During the etching and/or mask removal processes, the material of the semiconductor device has a high likelihood of being contaminated by the etchant, which contamination greatly reduces the life of the device, the operating characteristics of the device, and the reliability of the device. The etch needed to remove the nitride mask can damage the semiconductor material adjacent the etched areas which further reduces life, operating characteristics, and reliability.
Thus, the prior art technique involves many process steps such as resist spinning, exposure, developing, cleaning and so on. All of these processes can introduce contamination, decrease yield, etc. A further problem that arises is that the structure or substrate (generally a wafer) must be removed from the growth chamber to remove the masking material. The structure is then masked again and reintroduced into the growth chamber for re-growth or for further processing. Thus, the prior art techniques keep the wafer vacuum incompatible.
Accordingly, it would be highly desirable to provide a new and improved method of resistless gate metal etch in the formation of a heterojunction field effect transistor.
It is a purpose of the present invention to provide a new and improved method of resistless gate metal etch in the formation of a heterojunction field effect transistor having reduced steps.
It is another purpose of the present invention to provide a new and improved method of resistless gate metal etch in the formation of a field effect transistor which is vacuum compatible.
It is still another purpose of the present invention to provide a new and improved method of resistless gate metal etch in the formation of a field effect transistor which does not require the introduction of contaminants, such as photoresist, solvents and etchants.
It is a further purpose of the present invention to provide a new and improved method of resistless gate metal etch in the formation of a field effect transistor which is much simpler and includes less chance of contamination of the devices.
And a further purpose of the present invention is to provide a new and improved method of resistless gate metal etch in the formation of a field effect transistor which can be a completely dry process.